DIGITAL ELECTRONICS

Knowledge of the fundamental digital circuits to realize logic gates and the main digital building blocks, including combinatory and sequential circuits. Development of the main analysis and design strategies for the digital circuits.

The course is mainly structured as follows:

- frontal lessons where the retical parts are developped and presented in details;

- exercitations where the theoretical part are applied in practical cases, in order to develop, consolidate and putting in practice the theoretical topics.

Lesson attendance is strongly suggested

Should teaching be carried out in mixed mode or remotely, it may be necessary to introduce changes with respect to previous statements, in line with the programme planned and outlined in the syllabus.

Learning assessment

procedures Learning assessment is verified through the final exam. This consists of an exams with a written part and an oral one.

The wirtten part includes two questions (two exercises like those treated and solved during the lessons) to solve in one hour without the help of textbook or lecture notes. To pass this part it is mandatory to solve both the two questions.

The oral part includes three questions on three different course topics.

The final results take into account both the written and oral parts results .

Finally, learning assessment may also be changed (for example carried out on line), should the conditions require it.

• Introduction to short-channel MOS model and circuit layout
• Digital circuits parameters and performance
• CMOS logic families (static, dynamic and transmission gates)
• Power consumption in digital circuits
• Current mode logic circuits (bipolar and MOS)
• Sequential circuits
• Registers
• Counters
• Oscillators
• Pulse generators
• Schmitt Trigger
• Semiconductor Memories

1. J. Rabaey, A. Chandrakasan, B.Nikolic, Dital Integrated Circuits (2° edition), Prentice Hall, 2003
2. N. Weste, D. Harris, CMOS VLSI Design (3° edition), Addison Wesley, 2004.
3. M. Alioto, G. Palumbo, Model and Design of Bipolar and MOS Current-Mode Logic (CML, ECL and SCL Digital Circuits), Kluwer Academic Publisher, 2005.
4. M. Alioto, E. Consoli, G. Palumbo, Flip-Flop Design in Nanometer CMOS (High Speed to Low Energy), Springer, December 2014.