COMPUTER ARCHITECTURE

The course objectives are twofold: Primarily it aims to introduce students to digital systems' technologies. The second objective is the knowledge of computer's organization, Instruction Set Architecture, and common techniques for efficient implementation. At the end of the course, students will be able to design finite state machines and to develop simple programs in the assembly language for MIPS64-based architectures and in the C language for microcontrollers.

The main teaching methods are lectures, aimed at providing the basic theoretical knowledge, and exercises, proposed and solved by the teacher, aimed at improving student’s “problem solving”
skills, and introducing the use of IDEs. Laboratory activities relates to SW development for microcontrollers, held in conjunction with a tutor, support and complement lectures to better establish the knowledge acquired.

Part 1 - Digital Systems Design (25 h)

1.1. Design of Combinational Logic Networks:
Switching algebra. Minimum Boolean expressions. Minimisation with Karnaugh maps and Quine–McCluskey algorithm.

1.2. Design of synchronous circuits:
Introduction to sequential machines. Memory elements: flip-flops. Synthesis of synchronous circuits. Minimisation of Finite State Machines.

1.3. Digital systems design:
Design flow of a digital system. Datapath and Control Unit.

Part 2 - Computers (30 h)

2.1. Computer organisation:
Computer organisation. Computer Performance Evaluation Techniques. Instruction Set Architecture. Sequential processors. Datapath of a sequential processor. Control Unit of a sequential processor: hard-wired and microprogrammed logic.

2.2. Process Control Unit:
Instruction execution and straight-line sequencing. Single-cycle CPU. Multi-cycle CPU. Development of control logic. Considerations on multi-cycle implementation.

2.3. Pipeline
Pipeline properties. Pipeline execution. Execution phases. Hazards: data hazards, control hazards, and structural hazards.

2.4. The memory subsystem:
Static and dynamic RAM memories. Asynchronous and synchronous memories. Memory organisation. Cache memories. Evaluation of memory performance.

2.5. The Input/Output subsystem:
Polling. Interrupts. Vectored Interrupts. Priority management. Direct Memory Access.

2.6. Assembly language:
Assembler, linker, and loader. MIPS64 Instruction Set Architecture. Instruction Set Simulator for the EduMIPS64 processor. Assembly of the EduMIPS64 processor. Array management. Procedures.

Part 3 - Project development with microcontrollers (24 h)

3.1. Prototyping platforms.

3.2. Microcontrollers architecture.

3.3. Software development in C / C++ for 8 and 32-bit microcontrollers.

[T1] Fummi, Sami, Silvano, "Progettazione digitale", 2a edizione, McGraw-Hill;

[T2] Bucci, "Calcolatori elettronici. Architettura e organizzazione", McGraw-Hill;

[T3] Support material provided during the course.